Freescale to embed a hypervisor in its multi-core CPU

EE Times Asia is reporting that Freescale is adopting virtualization in upcoming dual-core CPUs:

Freescale is now sampling the first dual-core versions of its PowerQuicc processors, aimed at telecom OEMs. The chips are part of a family that will eventually scale to 32-core devices, said Dan Cronin, VP of R&D for Freescale’s networking division.

The processors will use a new on-chip interconnect fabric. They will also embed in hardware a hypervisor, a kind of low-level scheduling unit, co-developed with IBM according to specs set in the group. Freescale will release an open source reference design for companies that want to build virtualization software that taps into the hypervisor, Cronin said…